The semiconductor integrated circuit (IC) industry has experienced rapid growth. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process provides benefits by increasing production efficiency and lowering associated costs. However, it has also increased the complexity of processing and manufacturing ICs, and, for these advances to be realized, similar developments in IC manufacturing are needed.
Semiconductor devices are fabricated by creating a sequence of patterned layers defining semiconductor device features. Lithographic techniques are critical to providing these features and thus to semiconductor manufacturing generally. In a typical lithography process, a photosensitive layer (resist) is applied to a surface of a semiconductor substrate, and an image of features defining parts of the semiconductor device is provided on the layer by exposing the layer to a pattern of radiation. As semiconductor processes evolve to provide for smaller critical dimensions, and devices reduce in size and increase in complexity including number of layers, accurately patterning the features is increasingly more important to the quality, reliability, and yield of the devices. However, this patterning process is sensitive to the topographic heights of the target layer being exposed. Specifically, the depth of focus of the lithography system must account for these differences or the image may be substantially deteriorated. This problem may become more and more serious with use of higher numerical aperture (NA) processes. Furthermore, as the lithography systems to require strict environments for the target substrate (e.g., immersion fluid, vacuum, etc.), this also increases the challenges of understanding the topography of the target substrate.
Thus, while the typical fabrication processes may provide for some understanding of the level of topography of a substrate targeted for producing an image thereon, improvements in these metrology and lithography processes and systems may be desired.